In the treatment of semiconductor wafers used in the manufacture of a variety of semiconductor devices and integrated circuits, many different types of layer deposition and etching systems have been used and operated in such a manner as to introduce extraneous and undesirable particulate matter into the layer deposition and layer etching processes and into the related chemistries which are used in these systems. The source of this undesirable particulate matter is usually found in one or more elements within the interior housing of the chemical reaction chamber in which these layer deposition and etching processes are carried out.
For example, in a dry etch system, the cathode in the reaction chamber is typically made of graphite or a similar erodible material and will, over time and use, gradually decompose at the surface thereof. Similarly, other erodible materials within the reaction chamber such as carbon O-ring seals, aluminum and silicon electrodes, and ceramic shrouds can also be the source of this undesirable particulate matter. Such decomposition of the erodible hardware within the reaction chamber will in turn generate and free undesirable graphite or other particles into the interior of the reaction chamber. These extraneous particles will in turn be introduced into the gas phase or liquid phase reactions which are carried out in the etch chamber and thereby contaminate the chemical reactions taking place therein. In addition, the change in the original composition of the graphite electrodes also has the additional deleterious effect of changing both the etch rates and uniformity of wafer characteristics from batch to batch in a large scale wafer fabrication process.
All of the above phenomena serves to degrade semiconductor device quality and increase the length of equipment down time in order to permit adequate maintenance thereof which includes cleaning, gap checks and hardware changes. In addition, this phenomenon can also operate to reduce repeatability of results from batch to batch in a large scale wafer processing operation, and it also tends to reduce semiconductor device and integrated circuit yields.